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STRUCTURE PRODUCT SERIES TYPE FUNCTION
Silicon monolithic integrated circuits Bipolar stepping motor driver
BD6382EFV
PWM constant current controllable two H bridge driver Power save mode Reference voltage output Low on resistance DMOS
Absolute maximum ratings (Ta=25) Item Symbol Supply voltage VCC VCC Supply voltage VM VM
Limit Unit -0.2+7.0 V -0.2+15.0 V 1.11 W Power dissipation Pd 4.02 W Input voltage for control pin VIN -0.2(VCC +0.3) V RNF maximum voltage VRNF 0.5 V Maximum output current IOUT 0.83 A/ch Operating temperature range Topr -40+85 Storage temperature range Tstg -55+150 Junction temperature Tjmax 150 1 70mmx70mmx1.6mm glass epoxy board. Derating in done at 8.8mW/ for operating above Ta=25 2 4-layer recommended board. Derating in done at 32.0mW/ for operating above Ta=25. 3 Do not exceed Pd, ASO.
Operating conditions (Ta=-40+85) Item Symbol Supply voltage VCC VCC Supply voltage VM VM Input voltage for control VIN Output current (DC) IOUT 4 Do not exceed Pd, ASO.
Min. 3.0 5.5 0 -
Typ. 3.3 6.0 0.3
Max. 5.5 13.5 VCC 0.54
Unit V V V A/ch
This product isn't designed for protection against radioactive rays.
Status of this document The Japanese version of this document is the formal specification. A customer may use this translation version only for a reference to help reading the formal version. If there are any differences in translation version of this document, formal version takes priority.
REV. A
2/4 Electrical characteristics (Unless otherwise specified Ta=25VCC=3.3VVM=6.0V) Item Symbol Min. 2.0 0 15 -10 Limit Typ. 0 1.6 0 0.08 30 0 Max. 10 3.0 10 0.50 3.3 0.8 60 Unit Conditions
Whole VCC current at standby ICCST VCC current ICC VM current at standby IVMST VM current IVM Control input (PS, IN1A, IN1B, IN2A, IN2B) H level input voltage VINH L level input voltage VINL H level input current IINH L level input current IINL Output (OUT1A, OUT1B, OUT2A, OUT2B) Output ON resistance Output leak current Current control RNFX input current SENSEX input current VLIMX input current VLIMX input voltage range Comparator offset voltage Noise cancel time VREF voltage RON ILEAK IRNF ISENSE IVLIM VVLIM VOFS tn VVREF
A mA A mA V V A A
PS=L PS=H, VLIMX=0.5V PS=L PS=H, VLIMX=0.5V
VIN =3V VIN =0V IOUT = 0.3A, VM=6V Sum of upper and lower
-40 -2.0 -2.0 0 -10 0.3 0.97
1.2 -20 -0.1 -0.1 0.7 1.00
1.5 10 0.5 10 1.2 1.03
A A A A V mV s V
RNFX=0V SENSEX=0V VLIMX=0V
R=39k, C=1000pF IVREF=0~1mA
Input-output logic table INPUT IN1A PS L H H H H IN2A X L H L H IN1B IN2B X L L H H OUTPUT OUT1A OUT2A OPEN OPEN H L L OUT1B OUT2B OPEN OPEN L H L All circuit Standby Standby Forward Backward Brake X: H or L
REV. A
3/4 Package outline
Product No.
BD6382
Lot No.
HTSSOP-B24 (Unit:mm)
Block diagram
VCC
24
Pin No. / Pin name Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 Pin name GND PS VLIM1 SENSE1 CR1 IN1A IN1B NC VM1 OUT1A OUT1B RNF1 Pin No. 13 14 15 16 17 18 19 20 21 22 23 24 Pin name RNF2 OUT2B OUT2A VM2 NC IN2B IN2A CR2 SENSE2 VLIM2 VREF VCC
VREF 23
VREF
Current Limit Comp. VLIM1 3
9 VM1 10 OUT1A
Predriver
11 OUT1B 12 RNF1
CR1 5
CR Timer
4 SENSE1
PS 2 IN1A 6 IN1B 7 IN2A 19 IN2B 18 Logic
UVLO TSD OCP
NC : Non Connection
CR2 20
CR Timer
16 VM2 15 OUT2A
Predriver
14 OUT2B 13 RNF2
VLIM2 22 Current Limit Comp.
21 SENSE2
1
GND
REV. A
4/4 Operation Notes (1) Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. (2) Power supply lines As return of current regenerated by back EMF of motor happens, take steps such as putting capacitor between power supply and GND as an electric pathway for the regenerated current. Be sure that there is no problem with each property such as emptied capacity at lower temperature regarding electrolytic capacitor to decide capacity value. If the connected power supply does not have sufficient current absorption capacity, regenerative current will cause the voltage on the power supply line to rise, which combined with the product and its peripheral circuitry may exceed the absolute maximum ratings. It is recommended to implement a physical safety measure such as the insertion of a voltage clamp diode between the power supply and GND pins. (3) GND potential The potential of GND pin must be minimum potential in all operating conditions. (4) Metal on the backside (Define the side where product markings are printed as front) The metal on the backside is shorted with the backside of IC chip therefore it should be connected to GND. Be aware that there is a possibility of malfunction or destruction if it is shorted with any potential other than GND. (5) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. This IC exposes its frame of the backside of package. Note that this part is assumed to use after providing heat dissipation treatment to improve heat dissipation efficiency . Try to occupy as wide as possible with heat dissipation pattern not only on the board surface but also the backside. (6) Actions in strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. (7) ASO When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO. (8) Thermal shutdown circuit The IC has a built-in thermal shutdown circuit (TSD circuit). If the chip temperature becomes Tjmax=150, and higher, coil output to the motor will be open. The TSD circuit is designed only to shut the IC off to prevent runaway thermal operation. It is not designed to protect or indemnify peripheral equipment. Do not use the TSD function to protect peripheral equipment. (9) Ground Wiring Pattern When using both large current and small signal GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either.
REV. A
Notice
Notes
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